Tanner Andrulis

Ph.D. Student, MIT EECS · EEMS Group

I'm a fifth-year Ph.D. student at MIT, advised by Profs. Vivienne Sze and Joel Emer.

My research is in the modeling and design of specialized accelerators for machine learning. My work has covered novel compute paradigms, including analog, compute-in-memory, optical, and superconducting accelerators. Currently I'm building tools that optimally schedule deep neural network workloads onto specialized accelerators, and applying those tools to novel and heterogeneous systems.

Publications and Talks

LoopForest: Exploring an Expanded Fusion Mapspace for Reduced Data Movement and Memory Usage
Michael Gilbert, Tanner Andrulis, Vivienne Sze, Joel S. Emer
Under submissionPublicationsMapping
Small-Noise is All You Need: Fast and Precise Estimation of Compute-in-Memory Accuracy Loss
Soojung Bae, Tanner Andrulis, Vivienne Sze, Joel S. Emer
Under submissionPublicationsCompute-In-Memory
Fast and Fusiest: An Optimal Fusion-Aware Mapper for Accelerator Design
Tanner Andrulis, Michael Gilbert, Vivienne Sze, Joel S. Emer
Under submissionFeb 2026PublicationsMappingTools
The Turbo-Charged Mapper: Fast and Optimal Mapping for Energy-efficient and Low-latency Accelerator Design
Michael Gilbert, Tanner Andrulis, Vivienne Sze, Joel S. Emer
MICRO 2026Feb 2026PublicationsMappingTools
CiMLoop: A Flexible, Accurate, and Fast Compute-In-Memory Modeling Tool
Tanner Andrulis, Joel S. Emer, Vivienne Sze
ISPASS 2024May 2024PublicationsCompute-In-MemoryToolsISPASS 2024 Best Paper Award Winner
Architecture-Level Modeling of Photonic Deep Neural Network Accelerators
Tanner Andrulis, Gohar Irfan Chaudhry, Vinith M. Suriyakumar, Joel S. Emer, Vivienne Sze
ISPASS 2024May 2024PublicationsPhotonicsTools
Modeling Analog-Digital-Converter Energy and Area for Compute-In-Memory Accelerator Design
Tanner Andrulis, Ruicong Chen, Hae-Seung Lee, Joel S. Emer, Vivienne Sze
arXiv preprintApr 2024PublicationsCompute-In-MemoryTools
Efficient, Accurate, and Flexible PIM Inference through Adaptable Low-Resolution Arithmetic!
Tanner Andrulis
MIT Master's ThesisJul 2023PublicationsCompute-In-MemoryArchitectures
Efficient AI Inference With Analog Processing In Memory
Tanner Andrulis
CSAIL Alliances Annual Meeting 2023Jun 2023TalksCompute-In-MemoryArchitectures
RAELLA: Reforming the Arithmetic for Efficient, Low-Resolution, and Low-Loss Analog PIM: No Retraining Required!
Tanner Andrulis, Joel S. Emer, Vivienne Sze
ISCA 2023Jun 2023PublicationsCompute-In-MemoryArchitectures
Architectural Evaluation of Processing-In-Memory Systems
Tanner Andrulis, Joel S. Emer, Vivienne Sze
ASPLOS YArch Workshop 2022Mar 2022TalksCompute-In-MemoryArchitectures